ZEON FUNDAMENTALS EXPLAINED

The 2nd Variation, named "Cascades", was based on the Pentium III "Coppermine" Main. The "Cascades" Xeon utilized a 133 MT/s entrance side bus and relatively tiny 256 kB on-die L2 cache causing Nearly the identical abilities since the Slot 1 Coppermine processors, which had been capable of dual-processor operation but not quad-processor or octa-p